UP Diliman Microfabrication Facility (UPDMF)
A PCARI-CHED funded project, Vibrational Energy Harvesters for Resilient Environmental Sensor Nodes (VERSe), established the first university-based microfabrication, cleanroom facility in the country last November 2020. The UP Diliman Microfabrication Facility (UPDMF), housed in UP DMMME’s Plasma-Material Interactions Laboratory (PMIL), occupies approximately 87m² of cleanroom space and is equipped with a wide-range of cleanroom microfabrication equipment that caters to several microfabrication processes such as photolithography, thin-film deposition and characterization, plasma etching, back-end processing and more.
The facility was initial equipped to explore the development of chip-scale energy harvesters in the Philippines. After the successful implementation of project VERSe, the UPDMF is now open to other researchers who are interested in pursuing microfabrication-related research. Currently, UPDMF is hosting one of the projects of the DOST-funded Center for Integrated Circuits and Devices Research (CIDR) program that aims to explore the interaction between MEMS-based sensors and their corresponding interface circuits.
Capabilities
UPDMF On Site
- Yellow room cleanroom has up to 31 m2 floor area
- White room cleanroom has up to 56m2 floor area
- Cleanroom HEPA filters with efficiency of 99.995% are installed in both cleanrooms
- Pre-filter and secondary filter are located at the wall inside the duct of both cleanrooms
- Supplied with negative air plenum type with FFU and H-14 HEPA filters
- Installed with cleanroom air shower, passbox, safety shower, and gas lines
- Cleanroom complies with ISO-14644 standard
UP Diliman Microfabrication Facility (UPDMF) specializes in the microfabrication of devices. In fact, its first output is the prototype and fabrication of piezoelectric energy harvesters. These devices have feature sizes ranging from 1 – 10,000 µm and were interfaced to a locally-designed power management circuitry. These are all made by the researchers from UP EEEI Microlab and UP DMMME PMIL, in collaboration with UC Berkeley. Today, UPDMF continues to serve as a research laboratory that aims to explore the local development of microfabricated sensors, focusing on novel materials synthesis and low-cost fabrication processes.
Research Projects
VERSe
Vibrational Energy Harvesters for Resilient Environmental Sensor Nodes
The VERSe project’s main goal was to develop vibrational energy harvesters for powering wireless sensor nodes. With the current trend of wireless sensor networks (WSNs) being used for environmental and energy monitoring, the number of sensor nodes in these networks continuously increases. To extend the lifetime of these sensor nodes, harvesting energy from ambient vibrations was explored in this project.
The project was done in collaboration with the Microelectronics laboratory of the Electrical and Electronics Engineering Institute, Plasma Materials Laboratory of the Department of Mining, Metallurgical and Materials Engineering of the University of the Philippines Diliman and Marvell Nanofabrication laboratory of the University of California, Berkeley.
Researchers in the project were trained with microfabrication techniques in UC Berkeley. During the training, the initial device fabrication characterization steps were performed and the acquired skillset was used in UPDMF to apply common laboratory practices and locally characterize fabrication recipes.
The piezoelectric effect in low-temperature PZT films using fabrication processes compatible with printing technology was also successfully demonstrated in another partner laboratory, the UC Berkely Printed Electronics Laboratory. Lead zirconate titanate (PZT) and Zinc Oxide (ZnO) were investigated for their piezoelectric properties and potential as the device’s active layer. These films were then formed into piezoelectric cantilevers by applying the UPDMF characterized lithography, and micromachining techniques.
A power management unit (PMU) that takes care of harvesting the energy from the fabricated piezoelectric energy harvesters was designed using a standard 0.35-μm complementary metal-oxide-semiconductor (CMOS) process. Through this research, interfacing the PMU with commercially available piezoelectric transducers and with the locally fabricated ones in UPDMF were successfully demonstrated.
CIDR
Center for Integrated Devices and Research
Model-Driven Co-Design of MEMS-Based Sensors and Interface Circuits
CIDR project 2 is the newest ongoing project in UPDMF that aims to explore the interaction between MEMS-based sensors and their corresponding interface circuits, as well as formulate an effective way of co-designing and co-simulating both technologies.
It is divided into three components namely: (1) modeling, simulation, and fabrication of the MEMS-based sensors, (2)modeling, design, simulation, layout implementation, fabrication, and testing of the interface circuits, and (3) formulation of co-design and co-simulation methodology for the sensors and interface circuits.
For this project, two types of MEMS-based sensors are being developed: (1) vibration/pressure sensors and (2) temperature sensors. These sensors will be modelled, simulated, and fabricated to be able to analytically and experimentally characterize their performance. For the interface circuits, behavioral models of the signal conditioning and data acquisition blocks will be developed. These models should be able to predict important performance metrics of each block and be able to take into account the existing tradeoffs between them.
Publications
These are some of the publications of researchers from UPDMF.
[1] Manzano, J. M., Vasquez, M. R., Rosales, M. D., & Leon, M. T. (2021). Characterization and modeling of surface roughness on a silicon/PZT Unimorph cantilever using finite element method. Journal of Fluid Flow, Heat and Mass Transfer, 8, 135–146. Crossref, doi: 10.11159/jffhmt.2021.015.
[2] P. L. Panis et al., “Design and Implementation of a Self-starting Thermal Energy Harvester with Resonant Startup and Maximum Power Point Tracking Capabilities/or Wireless Sensor Nodes,” 2019 International SoC Design Conference (ISOCC), 2019, pp. 95-96, doi: 10.1109/ISOCC47750.2019.9027707.
[3] Caburnay, A. G., Gabriel S.A. Reyes, J., Alvarez, A. B., de Leon, M.T., Hizon, J. R., Rosales, M. D., Santos, C.G., Sabino, M. P. R., “Design Space Exploration of a 512KB STT-Assisted SOT MRAM Cache,” 2020 International SoC Design Conference (ISOCC), IEEE, Oct. 2020 Crossref, doi,: 10.1109/ISOCC50952.2020.9333087.
[4] Manzano, J. M., Vasquez, M. R., Rosales, M. D., & Leon, M. T. (2021). Numerical Modeling of Surface Roughness Effects on the Natural Frequency of a Silicon Cantilever”. International COnference on Energy Harvesting, Storage, and Transfer, Avestia Publishing, Nov. 2020. Crossref, doi: 10.11159/ehst20.109
[5] Arce, E. P., De Leon, M. G., Rosales, M. D., Yamaguchi, T., & Vasquez, M. R. (2020, November). Synthesis of nanostructured zinc oxide films [Paper presentation]. 18th International Conference on Thin Films & 18th Joint Vacuum Conference, Online. https://static.akcongress.com/downloads/ictf/ictf2020-book-of-abstracts.pdf
[6] R. J. B. Butalid, A. P. S. Cristobal, A. D. S. Montallana, and M. R. Vasquez Jr., “Stability of TiO2-coated ZnO photocatalytic thin films for photodegradation of methylene blue,” Journal of Vacuum Science & Technology B, vol. 38, no. 6. American Vacuum Society, p. 062205, Nov. 2020. doi: 10.1116/6.0000306.
[7] S. L. Mindoro et al., “A CMOS Power Management Unit with Undervoltage Lockout Circuit as Startup for Piezoelectric Energy Harvesting Applications,” 2021 18th International SoC Design Conference (ISOCC), 2021, pp. 131-132, doi: 10.1109/ISOCC53507.2021.9613995.
[8] A. G. Leynes, J. R. E. Hizon, M. T. G. de Leon, and M. D. Rosales, “Asymmetric Charge Transfer Scheme Model in ML-SSHC with Consistent Power Extraction Improvement for Piezoelectric Energy Harvesters,” 2021 18th International SoC Design Conference (ISOCC). IEEE, Oct. 06, 2021. doi: 10.1109/isocc53507.2021.9614018.
Members
Currently, UPDMF is run by the following researchers and administrative staff from the University of the Philippines Diliman Electrical and Electronics Engineering Institute (EEEI) and Department of Mining, Metallurgical, and Materials Engineering (DMMME).
Project Leader
Project Senior Technical Specialist
Project Technical Specialist III – Administrative Officer
Project Technical Specialist V – Safety Engineer
Project Technical Specialist IV – IC Design Lead
Project Technical Specialist III – IC Design Co-lead
Project Technical Specialist III – Device Fabrication
Project Technical Specialist III – Device Fabrication
Project Technical Specialist I – IC Design
Project Technical Specialist I – IC Design
Sensor Modeling Specialist – Device Fabrication
Project Administrative Assistant
Dr. Magdaleno Vasquez Jr.
Project Staff III
Dr. John Richard Hizon
Project Staff III
Project Staff III
Project Staff III
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