My research interest is in the field of digital integrated circuits, focusing mainly on energy efficient techniques for energy-limited IoT applications. My current research is on energy scalability of image and video feature extraction accelerators.
Alvarez, A. and Alioto, M. “Security down to the hardware level,” in Enabling the Internet of Things - from Circuits to Networks, Springer, 2017.
Alvarez, A. B., Zhao, W., and Alioto, M. “Static physically unclonable functions for secure chip identification at 0.6-1 V and 15fJ/bit in 65nm,” IEEE J. Solid State Circuits, vol. 51, no. 3, pp. 763–775, 2016.
Zhao, W., Alvarez, A. B., and Ha, Y. “A 65-nm 25.1-ns 30.7-fJ robust subthreshold level shifter with wide conversion range,” IEEE Trans. Circuits Syst. II, vol. 62, no. 7, pp.671–675, 2015.
Alvarez, A., Zhao, W., Alioto, M. “15fJ/b Static physically unclonable functions for secure chip identification with <2% native bit instability and 140x inter/Intra PUF Hamming distance separation in 65nm”, Proc. IEEE Int. Solid-State Circuits Conf., Feb. 2015.
Abadies, H., Alvarez, A., Madamba, J.A., Alarcon, L. “The effects of integrated controller techniques on the flash memories“, Proc. International SoC Design Conference (ISOCC) 2013, Nov. 17-18, 2013, Busan, South Korea.
Zhao, W., Ha, Y., Hoo, C.H., and Alvarez, A.B. “Robustness-driven energy-efficient ultra-low voltage standard cell design with intra-cell mixed-Vt methodology,” Proc. International Symposium on Low Power Electronic Devices (ISLPED), 2013, pp. 323–328.